low-power mixed-signal IC design

 

Testimonials

Louis Parks, CEO

When SecureRF introduced the Algebraic
Eraser TM to RFID we were looking to combine the world's most efficient public-key cryptosystem with the world's most energy-sensitive platform.
Silicon success depended upon the design team developing an architecture that leveraged the inherent efficiency of our braid group operators to make the circuit fast, small and secure.


The TopoLogic team had the rare insight to understand our hard mathematics and rapidly designed the logic and VLSI circuits that
met all of our operational requirements and produced the first generation of the securest RFID tag available today.





Louis Parks, CEO, SecureRF Inc.

 

Contact Information

 
TopoLogic Semiconductors Corp.
2033 Gateway Place
5th Floor
San Jose, CA 95110
 
Email
info@topologicsemi.com
 
Phone
+1-800-533-1327
+1-408-420-5048
 

 

WELCOME TO TOPOLOGIC SEMICONDUCTORS CORP.

For sub 90nm CMOS SoC designs power has become the dominant constraint in delivering production worthy silicon. TopoLogic Semiconductors Corp services the needs of IC development teams that need to get to silicon quickly with robust implementations of low-power mixed signal designs.

Whether you are using one of our proven IP cores or just need some extra bandwidth on your team. Our mission is simple: get you to tapeout. We provide whatever you need to make this happen with no ifs, ands or buts....

Innovating and offering our own family of IP cores, SignalIP™ is targeted for use in security and digital signal processing applications.

 

OUR SERVICES

 

On-site, at-your-site, TopoLogic Semiconductors offers full tool flow design from architecture to physical implementation.

The following is representative of the list of core skills our development teams provide:

System Design - Architecture/implementation, DSP, ASIC, SoC, IP/Cores, FPGA, RFID, Analog, Mixed-Signal, logic/RTL, Verilog, VHDL

Design Implementation - Synthesis, MBIST, LEC, DFT, Power Analysis, ECO

Design Verification - SystemVerilog/SystemC, VERA, AVM, OVM, DV methodology, Digital, Analog, Functional

Physical design - Floorplanning, Full custom layout, P&R, RTL to GDSII, various process technologies including TSMC 40nm

Physical verification - critical timing, logic design & methodology, DRC, LVS, ERC

More...

 
 

News Section

 

EETimes Semi News

EETimes Semi News

ST claims three design wins for its fully-depleted silicon on insulator manufacturing process; a move that could draw out support from EDA software and IP providers.

View the full article HERE.
STMicroelectronics, which began researching phase-change memory more than a decade ago, has said it will offer microcontrollers integrated with the non-volatile memory.

View the full article HERE.
Samsung sells electrowetting display pioneer to Amazon for an undisclosed sum.

View the full article HERE.
At its annual developer's conference, Google showed advances across seven major platforms--Android, Chrome, Glass, Google+, Maps, Search and Google TV.

View the full article HERE.
National Taiwan University has developed several innovations for tablets and smartphones designed to win the hearts of mass-market users.

View the full article HERE.
ST tells analysts it is going to report financial results for both its digital and analog business segments for "transparency" but remains committed to exploiting manufacturing technologies it has Crolles, including its FDSOI process.

View the full article HERE.
Startup is developing physical IP for geometries at 20-nm and below with an initial focus on SRAM structures for implementation in FinFET and FDSOI processes.

View the full article HERE.
Stealthy startup offers non-volatile memory IP for use in unmodified logic processes and claims to be already in volume production at three foundries.

View the full article HERE.
Mellanox expects acquisition to enhance competitiveness, expand its ability to deliver next-generation optical connectivity.

View the full article HERE.
E Ink is preparing to launch a 13.3-inch sized flexible e-paper display. Mass production due in 2H13.

View the full article HERE.
Handset sales were down year-over-year in all regions expect Asia-Pacific, according to Gartner.

View the full article HERE.
Massimo Banzi launched a $69 Arduino board that plugs do-it-yourselfers into the cloud using a Wi-Fi chip from Qualcomm Atheros running a custom variant of Linux.

View the full article HERE.
Renesas is researching ultra-low power short-range radio with IMEC, targeting sensor networks for automotive and industrial purposes.

View the full article HERE.
Hardware model and and software debug tool functions integrated in simulation code stream provides performance, capability and ease-of-use benefits, claims vendor.

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In an interview Jean-Marc Chery, ST's CTO (shown), said his company could install its FDSOI process in multiple foundries but for now has an agreement in place that will deny certain companies access to the process.

View the full article HERE.
Firm claims new Armada chip is first mass market, quad-core, 5-mode Category 4 LTE single-chip solution.

View the full article HERE.
Globalfoundries has signed up to an IMEC R&D program on STT-MRAM which is seen as a promising high-density, non-volatile alternative to SRAM and DRAM and for embedded use.

View the full article HERE.
Taiwan has long been recognized for its contributions to microelectronics, but its research labs are now working on pressing social issues.

View the full article HERE.
Samsung Electronics Co. Ltd. has announced that is has an embedded flash memory capability ready for a 45-nm logic manufacturing process.

View the full article HERE.
Google will update Android camera API to support computational photography on graphics cores and build support for infrared into Android.

View the full article HERE.

IP/EDA

IP/EDA

One type of virtual prototype is a software development kit, specifically designed for application developers who have no need to know about the underlying hardware platform…

View the full article HERE.
New PDK developed by Tanner EDA for Dongbu HiTek low voltage 0.18um process allows integration of bipolar, CMOS and DMOS on a single die…

View the full article HERE.
Silicon may be the dominant material for electronics, but some other niche applications required specialized materials such as Silicon Carbide…

View the full article HERE.
High-Level Synthesis is great for algorithmic blocks, but what about the interfaces? Calypto introduces an AXI block to their library…

View the full article HERE.

TopoLogic Semiconductors Corp. provides IC solution and services to leading semiconductor product companies. Over the years, Hardware and Software managers in a wide variety of businesses throughout the US have come to rely on TopoLogic Semiconductors Corp. Why? We deliver the technical contractor talent they need to aggressively compete in an ever-changing economy.       more...